The present invention relates to an inductive amplifier. More specifically, the present invention relates to an inductive amplifier having a feed-forward boost function.
FIG. 1 is a circuit diagram of a conventional inductive amplifier 100, which may operate as an analog front end in a semiconductor chip. Inductive amplifier 100 includes inductors L1-L2, resistances rr1-rr2, capacitors C1-C2, resistors R1-R2, n-channel transistors N1-N2, current source I1, and output nodes ON and OP. A differential input signal VIN-VIP is applied to the gates of transistors N1 and N2, respectively. The VIN and VIP signals represent the negative and positive phases of the differential input signal, respectively. As described below, inductive amplifier 100 operates to create boosted output signals VOP and VON in response to the input signals VIN and VIP.
When the VIN input signal is high relative to the VIP input signal, then the VOp output voltage on node OP is pulled lower than the VON output voltage on node ON. Conversely, when the VIP input signal is high relative to the VIN input signal, then the VON output voltage on node ON is pulled lower than the VOP output voltage on node OP. The various elements of inductive amplifier 100 are connected such that the VOP and VON output voltages are amplified with respect to the VIP and VIN input voltages.
FIG. 2 is a Bode plot illustrating several typical frequency response curves 201-203 for inductive amplifier 100. The frequency response depends on the values of resistors R1, R2, rr1 and rr2 versus the values of inductors L1 and L2. In the following description of FIG. 2, resistances rr1 and rr2 are considered to be the parasitic resistances of the inductors L1 and L2 on chip. Thus, curves 201, 202 and 203 may represent the frequency response of inductive amplifier 100 when resistors R1 and R2 have resistances of 50, 100 and 300 Ohms, respectively. Note that for curve 201, amplifier 100 exhibits an acceptable gain at frequencies below the 3 db roll-off frequency. However, for frequencies above the 3 db roll-off frequency of curve 201, the gain is too low to enable inductive amplifier 100 to operate properly. Consequently, it may not be possible to use inductive amplifier 100 in communication applications that use high frequencies in the range of 5 GHz or greater.
Also note that as the values of resistors R1 and R2 decrease (i.e., curves 202 and 203), amplifier 100 can exhibit peaking. This inherently reduces the maximum gain of amplifier 100, because this amplifier must be designed within a limited range of resistances R1 and R2.
It would therefore be desirable to have an improved inductive amplifier that exhibits a high gain at relatively high frequencies in the range of 1 GHz or greater.
Accordingly, the present invention provides a low noise inductive amplifier having a feed-forward boost circuit that boosts the gain of an inductive amplifier circuit at high frequencies. That is, the feed-forward boost path provides an inductive amplifier having an increased bandwidth with respect to conventional amplifiers. In one embodiment, the feed-forward boost circuit adequately boosts the gain of the inductive amplifier to acceptable levels at frequencies greater than 1 GHz. For example, the feed-forward boost circuit can boost the gain of the inductive amplifier to enable operation at 10 Gigabits/second (Gb/sec).
In one embodiment, the feed-forward boost circuit includes a first boost transistor coupled receive a first differential input signal, a second boost transistor coupled to receive a second differential input signal, and a boost current source coupled to sources of both the first and second boost transistors. The drains of the first and second boost transistors are coupled to first and second intermediate output nodes of an inductive amplifier circuit, respectively. In one embodiment, the first and second intermediate output nodes correspond with ends of the load resistors of the inductive amplifier.
The AC current inserted by the feed-forward boost circuit causes the inductive amplifier to exhibit a relatively constant gain from DC (0 Hz) up to the resonant frequency of the entire LC tank circuit formed by the inductive amplifier circuit and the feed-forward boost circuit. Thus, the feed-forward boost circuit extends the range of frequencies at which the inductive amplifier exhibits an acceptable gain. Moreover, by controlling the sizing of the first and second boost transistors and the boost AC current source, the gain amplitude at the resonant frequency can be controlled. Moreover, it is possible to turn off the boost gain provided by feed-forward boost circuit by disabling the boost current source.
Advantageously, it is not necessary to use a negative resistance concept to achieve these results.
The inductive amplifier of the present invention can be used in any product that incorporates multi-gigabit transceivers that operate in the range of 1 Gb/sec and above. For example, the inductive amplifier of the present invention can be used in input sections of receivers in multi-gigabit transceivers, in field programmable gate arrays (FPGAs), or as stand alone parts.
In another embodiment, a loop-back path is provided, such that a signal provided by a transmitter is routed to the output terminals of the inductive amplifier, while the inductive amplifier is disabled. By providing this loop-back path, the transmitted signal can be routed to a bit-error rate monitor, such that bit-error rate of the transmitted signal can be accurately determined. The loop-back path therefore enables the inductive amplifier to be used in serializer/deserializer (SerDes) applications.